CT5

So I was able to finish my drawing and also create the Glass Bridge for my LCD. Unfortunately the glass bridge will have to be large. I was also able to create padded indents in my top case to accommodate the MX Switches. I still need to test everything in an assembly. I also created indents for the Knobs.

I added MX Switches to Creative Pad PCB Assembly so that I could turn it into a simplified drawing. I was able to put my simplified drawing in OnShape's part studio. Then I added some padding to the switches because without it, even a slight misalignment would prevent it from going in the case.

Unfortunatly, KiCad Wakatime hasn't tracked all the time on my PCB in KiCad. Anyway, here is a picture on what Ive worked on.

So far, Ive added a KernelDrivers Dir and given it functionality to put the drivers in initrd. Im trying to redo the Initial Ram FS system without AI, because the old one used AI fully.

The time seems to have not merged. Anyway, the github repo now has proper testing info. If you want to test it, download the qcow2 file and put it in vbox. Give it at least 512mb.

I added a simple Block Device Class and fixed the PCI and PCIe classes. NOTE: PCIe IS UNTESTED.

I fixed the Page Frame Allocator, along with trying to fix other things, which failed.
Before, the Kernel required 4GB Minimum. After the Page Frame Allocator Fix, it now requires at least 512MB of ram. Its possible to get 256MB of ram, but it crashes.

I tried to optimize my kernel but every way I tried, I hit a dead end. At first, I was mapping every part of the ram, which caused my kernel to be unusable with any ram under 8G. Anyway, I was able to create a simple initrd cpio reader which can read the initrd from by uefi bootloader.

Im still having trouble with mapping and the stack. It fails after paging is enabled. Currently im disassembling the kernel to find the problem.

Turns out VirtualBox doesn't support PCIe, but PCI works. After a long time, I have finally ported my kernel to Higher Half. Mot of the addresses start at 0xFFFFFFFF00000000 and 0xFFFFFFFF80000000. This is to make the kernel more secure and to have full support for 32-bit apps.

For some reason, it cant find the MCFG table, possibly because my VM doesn't have PCIe Support.

Ok, the PCI took about 7 hours, because I partially implemented the PCI last time and now I have finished it. I still have to make the PCIe and MSIx, but that's for tomorrow.

Sorry for the Late Devlog. I needed to transfer files to my new PC and I also had issues with WSL. Anyways, I added the Heap Allocator and I partially made the PCI. Im hoping to finish it today.

Ok, so the ACPI was a pain to implement. The UEFI protocol seems to not have given me the exact correct Address for the RSDP. Once I realised that, there was another problem because of the unaligned XSDT.

I was finally able to test my I/O APIC by creating a Simple Keyboard Driver. I am going to implement a Keyboard Driver after I get my filesystem sorted. Then I can finally find a keyboard driver and Load it.

I added an I/O APIC. I just need to test this out. Hopefully this goes well.

I finally fixed the APIC and I also added the PIC class so that I can use that instead of the make shift remapping in the APIC class.

Still facing issues with the APIC.

Took me a while, but I got the APIC working. Now I just need to figure out how to test this thing.

I finally got the IDT working. Turns out you must separate the assembly sections to prevent the ISR's (Exception code) from running. I can now get exceptions for doing 1 / 0 and stuff like that. Although, writing to the kernel .text seems to not cause an exception. If you want a build, just ask me in Slack.

I added GDT. The layout uses a null Descriptor, Kernel Mode Code Segment, Kernel Mode Data Segment, User Mode Code Segment and a User Mode Data Segment.

Started on the GDT (Global Descriptor Table). Created the structs for the Segment Descriptor.

Tested Paging and Fixed Bugs with Page Frame Allocator and Page Table Manager.