8 bit CPU

8 bit CPU

8 devlogs
13h 22m

A custom 8-bit CPU architecture designed in Logisim, aimed at (mostly) having feature parity with the 6502

Timeline

ALU is done. I added in extra flags because why not add flags? everyone likes flags. One for every pin of the accumulator and four general purpose flags too. Also logisim is glitchy now, the circuit decides whether it'll work or not depending on how and where you place it. yay.

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Uhhhh i may have broken logisim

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ALU is now mostly complete!

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So it turns out I way overcomplicated bit shifters and I can just do this. Was messing about with muxes and d-type flip flops and tri-state buffers and all that and turns out they can all be replaced by the wires here.

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Instruction fetcher is done. It uses the ring counter to fetch the opcode and operand into registers.

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Here's a cool 8 bit register with increment + decrement inputs and carry + borrow outputs too! This allows you to make a 16 bit register pretty easily, which I might use 74LS193 counter ICs are pretty cool I guess.

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Added a ring counter

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8-bit registers! And they're made out of logic gates only!

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