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Building a Fully Custom 8-Bit CPU from Scratch
Im currently designing and simulating a real and working cpu from the ground up. The cpu uses a custom made instruction set. Once its finished you could actually run real programs on the physical chip.
https://github.com/Rodald/CRP
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Timeline
Even more bugs in the Main decoder. I finally managed to fix all of them and even wrote some tests to make sure no more are in the decoder. I never want to touch this file ever again. There are so many 0s and 1s and if only one of them is off the whole instruction doesnt work. The datapath is mostly done and hopefully doesnt require further changes. I also isolated most of the circuits so they are easier testable. The picture shows the new schematic of the datapath
I found some bugs in the MainDec module. Some bits were misaligned. I also managed to finish the ALU decoder which takes the current operation and tells the computer what arithmetic operation it should perform. The main decoder is similar to that but instead of controlling the ALU (arithmetic logic unit) it moves the data around the cpu. All of the wires parallel to each other are the control lines which will go into the datapath (the part that operates the pc, but needs signals to know what it should do).
Just noticed that there was a massive issue in the design of the jump instructions. They used to only work with positive relative jumps. Now the program can jump in both directions up and down. This was achieved by adding a sign extender. And logical shift left. It multiplies all of the addresses by 2
I optimized the controller to remove all of the unecessary subtractors and multipliers. I also managed to add the branching logic. It just uses the flags from the flag register and decides whether or not to jump. The project is written in verilog which is a programming language made for designing hardware. I luckly dont have to place all of the logic gates manually. The image shows that a lot of hardware was removed and some added.
A Basic controller which will change the inputs of the datapath depending on the current instruction and state of the machine. It sill needs some further work because it has way to much unecessary hardware like a multiplier and a subtractor.
After some back and forth I finally got the datapath planed out. The datapath is the operation part of the cpu. It contains the ALU which executes arithmetic operations and then writes them back to the registers which are also in the ALU.
Here is a list of the current Instruction set which the datapath is able to perform:
OPCODE MENEMONIC Operands
0000 MOV reg1 reg2 0000
0000 ADD reg1 reg2 0001
0000 SUB reg1 reg2 0001
0000 AND reg1 reg2 0011
0000 OR reg1 reg2 0100
0000 XOR reg1 reg2 0101
0000 LD reg1 0110
0000 ST reg1 0111
0000 PUSH reg1 1000
0000 POP reg1 1001
0000 PUSHF 1010
0000 POPF 1011
0000 LSR reg1 reg2 1100
0000 LSL reg1 reg2 1101
0000 ASR reg1 reg2 1110
0000 CMP reg1 reg2 1111
0001 CMPI reg1 immediate
0010 ADDI reg1 immediate
0011 SUBI reg1 immediate
0100 ANDI reg1 immediate
0101 ORI reg1 immediate
0110 XORI reg1 immediate
0111 MOV reg1 immediate
1000 RJMP address
1001 RET 1101 1101
1010 RCALL address
1011 JE address
1100 JNE address
1101 JB address
1110 JAE address
1111 JVC address
Created a testbench for testing the modules the CPU is made of. Also made some basic building blocks which will make the future design process much easier.
Finished the ALU, which is the brain of a cpu. It performs 16-bit arithmetic and logical operations.
